AT-2025-2016GR
Location
Austria
Internship type
ON-SITE
Reference number
AT-2025-2016GR
General discipline
Computer Science / Informatics
Completed Years of Study
1
Fields of Study
Languages
English Excellent (C1, C2)
Required Knowledge and Experience
-
Other Requirements
-
Duration
30 - 52 Weeks
Within These Dates
01.04.2025 - 31.03.2026
Holidays
NONE
Work Environment
-
Gross pay
2431 EUR / month
Working Hours
385.0 per week / 77.0 per day
Type of Accommoditation
Trainee with IAESTE assistance
Cost of lodging
400 EUR / month
Cost of living
750 EUR / month
Additional Info
Work description
During the internship, the student is part of a post-silicon verification team that performs electrical measurements of one (or more) of the following IP blocks that are developed in the Infineon Design Center lab in Villach. - Analog blocks in Infineon microcontrollers - Analog to Digital (ADC) and Digital to Analog (DAC) converters - High speed interfaces - High Precision Oscillators and PLLS - Power Management Systems (PMS) - Battery Management Systems (BMS) - DCDC Converter for low voltage applications and Linear Voltage Regulators (LDO) - RF blocks for radar systems - Bias & Control circuits for 5G antennas As part of the team, the intern will take over measurement tasks of analog-mixed-signal sub-blocks inside the IP. The verification lead for the certain IP is taking care to share details about the IP and the measurements to be performed, to delegate measurements and to support in case of questions. Nevertheless it is mandatory that the student is capable to work autonomously and can read and use the available documentation to execute tasks. Measurement task execution comprise: - Measurement setup erection -Setup check and evaluation if the defined measurement sequence is working as expected - Automation of the test execution via state of the art software framework - Preparation and presentation of measurement results -High quality documentation of measurement results that is required according to the automotive standards IATF 16949 and ISO26262
Deadline
12.06.2025